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SAVE: Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures

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Key Facts

Grant Number:
610996
Laufzeit:
09/2013 - 08/2016
Gefördert durch:
EU
Websites:
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Completed research projects of the High-Performance IT Systems group
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Detailinformationen

Projektleitung

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Prof. Dr. Christian Plessl

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Projektmitglieder

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Dr. Heinrich Riebler

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Prof. Dr. Christian Plessl

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Kooperationspartner

Polytechnikum Mailand

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STMicroelectronics

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Virtual Open Systems

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Technological Educational Institute of Crete

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ARM Limited

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Maxeler Technologies Limited

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Publikationen

Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs
H. Riebler, M. Lass, R. Mittendorf, T. Löcke, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (2017) 24:1-24:23.
Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, C. Bolchini, in: Proc. HiPEAC Workshop on Reonfigurable Computing (WRC), 2016.
Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, E. Del Sozzo, M.D. Santambrogio, C. Bolchini, in: Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), IEEE, 2016, pp. 1–5.
Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, Computers and Electrical Engineering 55 (2016) 91–111.
Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract)
T. Kenter, G.F. Vaz, H. Riebler, C. Plessl, in: Workshop on Reconfigurable Computing (WRC), 2016.
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