Jan Dennis Reimer, M.Sc.

Computer Engineering (DATE)

Research Student

Research, Teaching

Office Address:
Pohlweg 47-49
33098 Paderborn
Room:
P1.6.08.4

Publications

Latest Publications

Modeling Crosstalk-induced Interconnect Delay with Polynomial Regression

A. Stiballe, J.D. Reimer, S. Sadeghi-Kohan, S. Hellebrand, Modeling Crosstalk-Induced Interconnect Delay with Polynomial Regression, 37. ITG / GMM / GI -Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”  (TuZ’24), Feb. 2024, Darmstadt, Germany, 2024.


Minimizing PVT-Variability by Exploiting the Zero Temperature Coefficient (ZTC) for Robust Delay Fault Testing

H. Jafarzadeh, F. Klemme, J.D. Reimer, H. Amrouch, S. Hellebrand, H.-J. Wunderlich, in: To Appear in: IEEE International Test Conference (ITC’24), San Diego, CA, USA, November 2024, IEEE, San Diego, CA, 2024.


Optimizing the Streaming of Sensor Data with Approximate Communication

S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, H.-J. Wunderlich, in: IEEE Asian Test Symposium (ATS’23), October 2023, Beijing, China, 2023.


Robust Pattern Generation for Small Delay Faults under Process Variations

H. Jafarzadeh, F. Klemme, J.D. Reimer, Z.P. Najafi Haghi, H. Amrouch, S. Hellebrand, H.-J. Wunderlich, in: IEEE International Test Conference (ITC’23), Anaheim, USA, October 2023, IEEE, Anaheim, CA, USA, 2023.


On Cryptography Effects on Interconnect Reliability

A. Ghazal, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, On Cryptography Effects on Interconnect Reliability, 35. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’23), Feb. 2023, Erfurt, Germany, 2023.


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